Migrating to a Real-Time Distributed Parallel Simulator Architecture

Bernardt Duvenhage and Derrick Kourie

Summer Computer Simulation Conference 2007 (SCSC 2007)
San Diego, California (USA), July 15-18, 2007

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Abstract

A legacy non-distributed logical time simulator is migrated to a distributed architecture to parallellise execution. The existing Discrete Time System Specification (DTSS) modelling formalism is retained to simplify the reuse of existing models. This decision, however means that the high simulation frame rate of 100Hz used in the legacy system has to be retained in the distributed one---a known difficulty for existing distribution technologies due to inter-process communication latency.

A specialised publish-subscribe simulation model is used for the new simulator architecture. The simulation model, including the process synchronisation, is implemented using a low latency peer-to-peer TCP messaging protocol. The TCP send and receive buffers and TCP's Nagle algorithm are also tweaked to ensure low latency communication. Gigabit Ethernet is used at the hardware layer. A paralellised execution speed-up of four to five times is reached with six to eight machines at a simulation frame rate of 100Hz.

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