G "***************************************************************************** * CASE being modelled (for validation): * * * * Single Link, No Throttling, No Compression, using the i960CF processor. * * Generate LAN to WAN traffic, 60 channels. 1500 byte frames * * * ***************************************************************************** All service times are put into the BUS task. All LAN and WAN chips are out of the model. Operations doing direct access to bus. Arbitration time of 70ns is added into bus access time. 240ns is a read/write access time for both LAN and WAN. LAN_TX_memop = 32 bytes * 240ns + 70ns WAN_TX_memop = 8 bytes * 240ns + 70ns WAN_RX_memop = 4 bytes * 240ns + 70ns (assumption avg. FIFO buf is 4 bytes full) LAN_RX_memop = 16 bytes * 240ns + 70ns (assumption avg. FIFO buf is 16 bytes full) Munich_Poll_memop = 3 * 240ns + 70ns (model now uses 4 accesses right now) WAN_RX_memop_ACK = 5 bytes * 240ns + 70ns CHECK: What about LAN_ACKs? Does RLAN do flow control if it's too busy, even though flow control is handled by LAN and WAN?) **** Divided DMA activity in half ******* Speed of LAN is 456060bytes/sec. Think time for LAN_driver is 0.003289, for 304 fps @ 150 0 bytes. average of 5.12 fps on WAN link. Munich Poll think time is: 0.0000039 Validation information: ----------------------- Frames TXed per link = 4578 Experiment time = 909 Average poll cycle time: 0.0049 Idle times and useful work times 40 idle for every 1 useful. Note: tandem polling effect occurs in all LAN to WAN HDLC_RX 0.00003 0.00039 HDLC_TX 0.000016 0.00057 (0.000276 valid for 500 byte packets) LAN_RU 0.000010 0.00016 LAN_CU 0.000009 0.000041 RXframer 0.000005 0.000057 (with larger span for average) old: 0.000063 TXframer 0.000006 0.000040 (a bit of a guess, based on histogram) Curtis's measurements for 500 byte packets, average work per frame: HDLC_RX 5.4E-4 * HDLC_TX 4.98E-4 * LAN_RU 9.94E-5 LAN_CU 4.72E-6 RXframer 1.12E-4 TXframer 1.47E-4 * = incorrect, because instrumentation for these functions at idle time was leaked out. NOTE: The time to recieve or send an ACK is almost the same as idle time for HDLC function s!!!" 0.00001 100 1 0.2 -1 #pragma multiserver=rolia P 8 p LAN_Driver f m 10 p LAN_Operation f i p bus_resource p p lan_resource f p Munich_poller f m 4 p WAN_chip f p Poll_Proc f i p Poll_over f i -1 T 9 t LAN_driver_RX r Ldriver_dummy -1 LAN_Driver z 0.00198 t LAN_op_RX n LAN_op_RX_ent -1 LAN_Operation m 100 t WAN_bus n Munich_RX_memop_bus Munich_TX_memop_bus Munich_Poll -1 bus_resource 3 t CPU_bus n TX_frame_bus_ent HDLC_Serv_TX_bus_ent LAN_Serv_RU_bus_ent TX_frame_overhead HDLC_TX_overhead LAN_CU_overhead HDLC_RX_overhead RX_framer_overhead -1 bus_resource 1 t LAN_toggle n LAN_RX_mode LAN_TX_mode -1 lan_resource t Munich_poll_TX r Munich_dummy -1 Munich_poller z 1000 m 4 t LAN_bus n LANchip_RX_memop_bus LANchip_TX_memop_bus -1 bus_resource 2 t Poll_Delay n LAN_RU_delay HDLC_TX_delay -1 Poll_Proc i t Poll_Overhead r Poll_Ent -1 Poll_over z 0.015 m 106 -1 E 21 f Ldriver_dummy 1 1 1 -1 s Ldriver_dummy 0.0000001 0 0 -1 z Ldriver_dummy LAN_op_RX_ent 1 0 0 -1 f LAN_op_RX_ent 1 1 1 -1 s LAN_op_RX_ent 0.0000001 0 0 -1 z LAN_op_RX_ent Munich_TX_memop_bus 94 0 0 -1 y LAN_op_RX_ent TX_frame_bus_ent 1 0 0 -1 y LAN_op_RX_ent HDLC_TX_delay 1 0 0 -1 y LAN_op_RX_ent LAN_RU_delay 1 0 0 -1 y LAN_op_RX_ent LAN_RX_mode 1 0 0 -1 f Munich_RX_memop_bus 1 1 1 -1 s Munich_RX_memop_bus 0.000001030 0 0 -1 f TX_frame_bus_ent 1 1 1 -1 s TX_frame_bus_ent 0.000035 0 0 -1 f HDLC_Serv_TX_bus_ent 1 1 1 -1 s HDLC_Serv_TX_bus_ent 0.00057 0 0 -1 f LAN_Serv_RU_bus_ent 1 1 1 -1 s LAN_Serv_RU_bus_ent 0.00016 0 0 -1 f Munich_TX_memop_bus 1 1 1 -1 s Munich_TX_memop_bus 0.00000199 0 0 -1 f LAN_RX_mode 1 1 1 -1 s LAN_RX_mode 0.0000001 0 0 -1 y LAN_RX_mode LANchip_RX_memop_bus 47 0 0 -1 f LAN_TX_mode 1 1 1 -1 s LAN_TX_mode 0.0000001 0 0 -1 y LAN_TX_mode LANchip_TX_memop_bus 24 0 0 -1 f Munich_dummy 1 1 1 -1 s Munich_dummy 0 0 0 -1 y Munich_dummy Munich_Poll 1 0 0 -1 f Munich_Poll 1 1 1 -1 s Munich_Poll 0.00000103 0 0 -1 f LANchip_RX_memop_bus 1 1 1 -1 s LANchip_RX_memop_bus 0.0000039 0 0 -1 f LANchip_TX_memop_bus 1 1 1 -1 s LANchip_TX_memop_bus 0.00000775 0 0 -1 s LAN_RU_delay 0.0075 0 0 -1 y LAN_RU_delay LAN_Serv_RU_bus_ent 1 0 0 -1 f HDLC_TX_delay 1 1 1 -1 s HDLC_TX_delay 0.0075 0 0 -1 y HDLC_TX_delay HDLC_Serv_TX_bus_ent 1 0 0 -1 f TX_frame_overhead 1 0 0 -1 s TX_frame_overhead 0.000006 0 0 -1 f HDLC_TX_overhead 1 0 0 -1 s HDLC_TX_overhead 0.000016 0 0 -1 f LAN_CU_overhead 1 0 0 -1 s LAN_CU_overhead 0.000009 0 0 -1 f HDLC_RX_overhead 1 0 0 -1 s HDLC_RX_overhead 0.00003 0 0 -1 f RX_framer_overhead 1 0 0 -1 s RX_framer_overhead 0.000005 0 0 -1 s Poll_Ent 0 0 0 -1 y Poll_Ent TX_frame_overhead 1 0 0 -1 y Poll_Ent HDLC_TX_overhead 1 0 0 -1 y Poll_Ent LAN_CU_overhead 1 0 0 -1 y Poll_Ent HDLC_RX_overhead 1 0 0 -1 y Poll_Ent RX_framer_overhead 1 0 0 -1 -1 # The following graphical information may be ignored.