Abstract: In the context of the IEEE 1588 Precision Time Protocol (PTP), estimating the delay's bias is a problem that appears in both one-way (using transparent devices) or two- way message exchange mechanisms. For estimating the offset via the two-way message exchange mechanism, it is usually assumed that the expected value of delays in forward and reverse directions are equal. However this is not a realistic assumption for packetbased wide area networks, where delays in down-link and uplink directions may have a significant difference. In this work we propose a solution to estimate the random delay's bias and improve the synchronization accuracy of IEEE 1588. Our method is easy to implement and is compatible with the current version of the protocol. We compared our results with no bias correction and the Boot-strap method. In addition to the improvement in synchronization accuracy, our method allows us to update the slave clock recursively. The proposed method works well even in the presence of large frequency offsets and can also be implemented by using different filters.
Keywords: IEEE 1588, clock synchronization, two-way message exchange mechanism, asymmetric delays, Boot-strap method, Gamma PDV.