Carleton University
Department of Systems and Computer Engineering
SYSC4505 Automatic Control Systems
  Fall 2008

Last Update:December 1 2008

Important Announcements

Homework 4 solutions are posted!
We will have a review class on Saturday at 10:30am in our regular class!  Dont miss it!

Also there is a discrepancy regarding the problem numbers for assignment 3 between the 3d  and the 4th edition of the text. If you have the 3d edition please download the pdf file containing the 4th assignment!
Some comments added to the assignment 3 solutions. Please read them.

Assignment 4 is posted and Due on December 1 at noon
Lab 4 will take place on Tuesday Nov. 18 and Thursday Nov.  20 in room 6055MC
Here is a file the you will need for the lab

Solutions for assignment 3 are posted.

Midterm exam and its solution

Third Homework is out due on Nov. 14.

Solutions for second assignment are now posted in the
Homeworks section

Second homework was given in class and will be collected on Oct. 28  Saturday Oct. 25 at midnight (slide it under my door in ME 4442). Solutions will be posted immediatelly after! We agreed on this in order to have enough time to study the solutions for the exam!

Homework solutions can be found in the Homeworks section below!

Here is the quiz and its solution


          Here is a good introductory paper on feedback!

          Some students have problems with Laplace transforms and their inversion! Here is an example of the partial fraction expansion for a transfer function with multiple poles

          We will soon need  log paper here are some resources to use with your computer: Log paper    Log paper program

          Homework 1 and its solution
          Homework 2 and its solution will be posted on Saturday oct. 25 night. As agreed in class homework 2 is due on Saturday 25 midnight in order to get the solutions and study them for the exam! Please note that this solution was updated on Monday 27 2008 since the old solution had some minor errors in  the final calculations of problem 5

       Homework 3:(Note that the problem numbers maybe somewhat different in the 3d edition of the textbook. If you have
                                the third edition please click on the link to get the correct homework assignment)

                                              Do the following problems from Chapter 6 (page 413): B-6-9, B-6-12, B-6-14, B-6-15, B-6-17. Due date is Friday Nov. 14 at  noon
                                             (slide them under my office door at ME4442)
and its solution with some extra comments

Homework 4(Note that the problem numbers maybe somewhat different in the 3d edition of the textbook. If you have
                                  the third edition please click on the link to get the correct homework assignment)

                                                Do the following problems from Chapter 8: B-8-1, B-8-7, B-8-11, B-8-15, B-8-27, B-8-29,  B-8-35
                                                I suggest that you try to plot some Bode diagrams using the piecewise approximations we did in class. Also you can verify with Matlab by plotting more
                                                 accurate plosts.
                                                Also do the following problems from Chapter  7 (will cover the design topic in time!): B-7-9, B-7-12

            Homework is due on December 1 at 12 noon so that solutions will be posted and you will have enough time to read for the exam!

                                                Homework 4 solution

      Voluntary Project

         Your cell phone operation depends heavily on an oscillator that can produce a variety of frequencies that are equally spaced. These are center frequencies of communication channels.
The system that generates these frequencies is called Phase Locked Loop (PLL). Its a control system that not only has wide applicability but also it can be an excellent topic to understand modern     control system design.
         This is a project that can be done on a voluntary basis. It will provide 10%  towards your final grade. Deadline is December 15 2008!

Phase Locked Loops

<> Design an oscillator that will be based on a PLL system and produce a clean sinusoidal output for the following frequencies:  Fl(n) = 640 + 0.2 (n)  MHZ for n=1,2...124. In this way we create 124 discrete frequencies for a Local Oscillator for a GSM receiver operating in the 880Mhz band and having an Intermediate frequency of 240Mhz. Design a PLL that will have a loop bandwidth of 10Khz and optimize it in terms of  lock in time and overshoot as you scan into different frequencies. You may wish to investigate the issue of phase noise, its origin, implications and methods for reduction. You can model the PLL as a closed loop feedback system with a first or second order filter after the phase comparator. Please include only passive filters in your analysis ( i.e. no opamps). The analysis should mainly focus on the control system aspect however, it will be nice ifyou select a PLL chip for Analog Devices or  National semiconductors and do a realistic design.  For a voltage controled oscillator I would recommend

Feel free to propose your ideas for design.

         Some references are as follows:

Feel free to visit the Analog Devices page for PLL design.You may try their SIMPLL software which is free and happens to be an excellent design tool.

Also check the following tutorial  paper from Analog Devices. Search the site for Part 2 and Part 3 of a paper series on PLL's these are very interesting.....

Another very good site is National Semiconductors. You may wish to check this paper first. You can find lots of additional papers and also a book (which I recommend highly) by Dean Banerjee  on PLL's at this site! There is also online tools  for PLL design.

Here is a good paper on PLL fundamentals from minicircuits

Lots and lots of excelent information on PLLs at You may spend lots of hours/days examining the material in this page....